Calculate trace impedance for controlled impedance designs. Supports microstrip, stripline, coplanar waveguide, and differential pair configurations.
Trace on outer layer with ground plane below. Most common for high-speed signals.
Based on IPC-2141 formulas. For production, verify with your fab house.
Standard flex PCB material
Standard rigid PCB
High frequency laminate
High frequency, low loss
Controlled impedance is the practice of holding a PCB trace geometry and dielectric environment within limits so that the signal path maintains a target characteristic impedance. On flex circuits, that target is influenced by copper thickness, dielectric thickness, trace spacing, and the effective dielectric constant of the material system.
This page was reviewed for GEO clarity by Hommer Zhao of WIRINGO so the content explains the underlying engineering terms, not only the interface or headline claim.
A calculator result is a starting point for layout decisions, not the last word on a released fabrication note. Once the routing style is chosen, the layout team still needs to align the numbers with the manufacturer’s material set, copper foil type, and etch compensation rules. Even small process differences can move a 50 ohm or 100 ohm target enough to matter on fast interfaces.
That is why strong teams use the first pass result to size routing channels and layer spacing, then ask the fabricator for a production stackup recommendation. When the line is part of a dynamic flex section, it also helps to separate electrical targets from bend targets so the interconnect is not optimized in one direction while becoming fragile in another.
The dielectric constant is one of the most important inputs because it drives the electric field distribution and directly affects characteristic impedance. Polyimide systems, adhesive layers, and copper roughness can all shift the effective result compared with a nominal data-sheet value. If the design spans different materials or bonded constructions, make sure the assumed number is realistic for the final stack.
Trace spacing is equally important for coplanar and differential structures. Engineers often focus on trace width alone, but coupled lines behave differently when the separation changes. If the design includes a connector launch or a local geometry squeeze, the final system behavior should be reviewed with those transitions in mind rather than by relying on one average number.
| Input | Why It Changes Impedance | Practical Note |
|---|---|---|
| Trace width | Changes conductor geometry and field spread | Keep etch compensation in mind |
| Dielectric height | Sets conductor-to-plane spacing | Usually has strong sensitivity |
| Copper thickness | Alters effective width and current distribution | Use finished copper when possible |
| Dielectric constant | Shifts wave propagation behavior | Prefer fabricator-approved values |
| Trace spacing | Affects coupling in differential and coplanar lines | Check local launch constraints |
The external references below are included as basic background reading for common manufacturing and interconnect terms used on this page.
https://en.wikipedia.org/wiki/IPC_(electronics)
https://en.wikipedia.org/wiki/ISO_9001
https://en.wikipedia.org/wiki/Crimp_(joining)