Bir cok gomulu donanim gecikmesi firmware ile baslamaz. Ekip, zaten sinira dayanan geleneksel bir stackup icine fazla arayuz, fazla yogunluk ve fazla mekanik kisit sikistirmaya calistiginda baslar.
Endustriyel gateway, kontrol modulu ve kompakt iletisim kartlarinda kirilma noktasi genellikle 0.5 mm BGA, DDR, radyo, shielding ve yogun konnektorlerle gelir. O noktada HDI bir luks degil, yeni bir layout dongusu ve EVT gecikmesini onlemenin pratik yoludur.
Why HDI PCB Matters
HDI, elektriksel yogunluk, mekanik zarf ve guvenilirlik hedefi ayni anda carpistiginda anlam kazanir. Standart bir kart ancak daha uzun yollar, fazla layer gecisi veya zoraki konnektor tasimalariyla calisiyorsa, HDI ciddi sekilde fiyatlanmalidir.
| Product type | Typical HDI trigger | Common stackup starting point | Main sourcing risk |
|---|---|---|---|
| Embedded SOM carrier board | 0.5 mm BGA, DDR routing, limited outline | 6L or 8L with 1-N-1 microvia | Escapes work in prototype but yield drops in volume |
| Industrial gateway | Ethernet, CAN, RS-485, wireless module, isolated power | 6L with selective microvia | EMI and creepage constraints compete for space |
| Compact HMI controller | Display connector density, processor + PMIC crowding | 6L HDI | Assembly warpage and rework difficulty |
| Radio or telecom module | Controlled impedance, shielding, dense RF + digital coexistence | 6L or 8L HDI | Impedance drift and stackup inconsistency |
| Edge AI or vision board | LPDDR, CSI/DSI, multiple regulators, thermal crowding | 8L HDI | Prototype passes, mass production gets copper balance issues |
| Rugged embedded I/O module | Small form factor plus harsh-environment test margins | 4L or 6L with microvia | Buyer under-specifies test plan and documentation |
"The expensive mistake is not choosing HDI too early. The expensive mistake is staying with a conventional stackup one revision too long, then paying for a rushed redesign after the enclosure, cable set, and firmware architecture are already frozen."
— Hommer Zhao, Engineering Director at FlexiPCB
Embedded Systems vs Communication Equipment
Gomulu kartlarda sorun daha cok entegrasyondur. Iletisim kartlarinda ise sorun marjdir: empedans, donus akimi, shielding, kayip ve partiler arasi tekrar edilebilirlik. Ayni microvia farkli urunlerde farkli bir riski cozer.
See our HDI flex PCB service page, impedance control guide, and flex PCB prototype guide for supporting detail.
Stackup, Cost, and Lead Time
“HDI kart” diye genel bir etiket istemek yeterli degildir. Dogru HDI seviyesi secilmelidir. 6L veya 8L 1-N-1 bircok gercek tasarimi kapsar. 2-N-2 veya filled via-in-pad ancak routing kaniti varsa gerekcelendirilmelidir.
| HDI build option | Typical use case | Relative fabrication cost | Relative lead time | Procurement comment |
|---|---|---|---|---|
| 4L with selective microvia | Compact industrial controller | 1.2x-1.5x | +2-4 days | Good first HDI step when density is moderate |
| 6L 1-N-1 HDI | Embedded compute, gateway, HMI | 1.5x-2.2x | +4-7 days | Most common balance of density and manufacturability |
| 8L 1-N-1 HDI | Dense processor plus memory plus comms | 2.0x-3.0x | +5-10 days | Strong option when routing density is real, not speculative |
| 8L 2-N-2 HDI | Telecom, RF-digital mixed boards, high escape demand | 2.8x-4.0x | +8-14 days | Only justify when layout proof shows 1-N-1 is insufficient |
| Via-in-pad + filled microvia | Ultra-dense BGA, shortest path, thermal pad escape | 3.0x-4.5x | +8-14 days | Excellent technically, expensive if overused |
"A buyer can save 20% on bare board price and still lose the program if the chosen stackup adds one more prototype loop, two more weeks of validation, and a redesign of the shielding or connector geometry."
— Hommer Zhao, Engineering Director at FlexiPCB
RFQ Checklist
Yararlı teklif sadece Gerber gondererek alinmaz. Muhendislik niyetini de gondermek gerekir: outline, kritik package’lar, stackup hedefi, miktarlar, empedans gereksinimi ve gercek calisma ortami.
- board outline and mechanical drawing
- Gerber or ODB++ data plus drill files
- BOM or at minimum the key fine-pitch packages, connectors, and RF parts
- quantity split: prototype quantity, pilot run, and annual demand
- operating environment, service life, and target lead time
- compliance target such as RoHS, UL, or customer specification
Prototype vs Production Risk
Ilk HDI prototip, kartin bir kez uretilebildigini gosterir. Seri uretimde ayni duzlugu, via dolgusunu, empedansi ve montaj performansini koruyacagini gostermez.
"If you want prototype results to predict mass production, the fabricator must know your intended production volume, test level, and qualification target at the quotation stage. Otherwise the prototype is optimized for speed, while production is optimized for repeatability, and the two do not match."
— Hommer Zhao, Engineering Director at FlexiPCB
Review assembly impact together with your flex assembly strategy and detailed routing constraints such as those in our component placement guide.
Qualification and Testing
RFQ asamasinda hangi kanitlari istediginizi tanimlayin: empedans coupon’lari, microsection, kaplama kalitesi, izlenebilirlik, yuzey bitisi ve gerekiyorsa cevresel testler. Sert endustriyel ortam hedefleniyorsa bu bastan yazilmalidir.
Use IPC, embedded systems, and telecommunications equipment references as part of the supplier review discussion.
FAQ
Bir gomulu kart ne zaman standart PCB’den HDI’a gecmeli?
BGA breakout, DDR, yogun konnektorler veya enclosure sinirlari sinyal, EMC ya da uretilebilirlik acisindan taviz zorluyorsa. 6 katmanli kart ancak fazla dolanarak calisiyorsa 1-N-1 secenegi degerlendirilmelidir.
Iletisim ekipmanlarinin cogu icin 1-N-1 yeterli mi?
Bir cok gateway, kontrol karti ve kompakt modul icin evet. 6L veya 8L 1-N-1 yogunluk, maliyet ve sure arasinda guclu bir denge sunar. Daha agresif RF tasarimlari ek dogrulama ister.
Bir satin almaci HDI PCB RFQ’suna ne eklemeli?
Cizim, Gerber veya ODB++, BOM ya da kritik package listesi, miktar, hedef teslim suresi, ortam, empedans hedefi ve compliance hedefi. Bunlar olmadan fiyat gelir ama savunulabilir teknik onerme gelmez.
Neden bazen HDI prototip geciyor ama seri uretim zorlanıyor?
Cunku prototip genelde hiz icin optimize edilir; seri uretim ise malzeme kontrolu, register, copper balance, via dolumu ve montaj duzlugu ister. Seri niyet erken tanimlanmazsa sonuc farki buyur.
Bir tedarikci HDI incelemesinden sonra ne geri donmeli?
En az stackup onerisi, DFM notlari, teslim suresi secenekleri, tooling varsayimlari, test onerileri ve seri uretimde yield riski yaratabilecek ozellikler.
Next Step
Drawing veya Gerber, BOM ya da kritik bilesen listesi, prototip ve seri miktari, calisma ortami, hedef teslim suresi ve compliance hedefini gonderin. DFM incelemesi, stackup onerisi, prototip-seri riskleri ve sure secenekli teklif geri donelim. Baslangic icin quote veya contact.
