Nhieu tre han trong du an hardware nhung khong bat dau tu firmware. Chung bat dau khi nhom co gang nhoi qua nhieu giao tiep, qua nhieu mat do va qua nhieu rang buoc co khi vao mot stackup truyen thong von da sat gioi han.
Trong gateway cong nghiep, module dieu khien va thiet bi truyen thong gon nhe, diem gay vo thuong den khi co 0.5 mm BGA, DDR, radio, shielding va connector mat do cao. Luc do HDI khong con la tuy chon sang trong ma la cach thuc te de tranh them mot vong layout va tre EVT.
Why HDI PCB Matters
HDI hop ly khi mat do dien, khong gian co khi va muc tieu do tin cay xung dot dong thoi. Neu mot bo mach tieu chuan chi con cach song bang duong mach dai hon, qua nhieu lan doi layer hoac doi vi tri connector bat dac di, thi nen bao gia HDI mot cach nghiem tuc.
| Product type | Typical HDI trigger | Common stackup starting point | Main sourcing risk |
|---|---|---|---|
| Embedded SOM carrier board | 0.5 mm BGA, DDR routing, limited outline | 6L or 8L with 1-N-1 microvia | Escapes work in prototype but yield drops in volume |
| Industrial gateway | Ethernet, CAN, RS-485, wireless module, isolated power | 6L with selective microvia | EMI and creepage constraints compete for space |
| Compact HMI controller | Display connector density, processor + PMIC crowding | 6L HDI | Assembly warpage and rework difficulty |
| Radio or telecom module | Controlled impedance, shielding, dense RF + digital coexistence | 6L or 8L HDI | Impedance drift and stackup inconsistency |
| Edge AI or vision board | LPDDR, CSI/DSI, multiple regulators, thermal crowding | 8L HDI | Prototype passes, mass production gets copper balance issues |
| Rugged embedded I/O module | Small form factor plus harsh-environment test margins | 4L or 6L with microvia | Buyer under-specifies test plan and documentation |
"The expensive mistake is not choosing HDI too early. The expensive mistake is staying with a conventional stackup one revision too long, then paying for a rushed redesign after the enclosure, cable set, and firmware architecture are already frozen."
— Hommer Zhao, Engineering Director at FlexiPCB
Embedded Systems vs Communication Equipment
Board embedded thuong dau o tich hop. Board communication thuong dau o bien do: impedance, return path, shielding, loss va tinh lap lai giua cac lot. Cung mot microvia nhung giai quyet van de khac nhau tuy theo san pham.
See our HDI flex PCB service page, impedance control guide, and flex PCB prototype guide for supporting detail.
Stackup, Cost, and Lead Time
Chi noi “can HDI board” la chua du. Quan trong la chon dung cap do HDI. 6L hoac 8L 1-N-1 da bao phu rat nhieu thiet ke thuc te. 2-N-2 hay filled via-in-pad chi nen dung khi routing that su bat buoc.
| HDI build option | Typical use case | Relative fabrication cost | Relative lead time | Procurement comment |
|---|---|---|---|---|
| 4L with selective microvia | Compact industrial controller | 1.2x-1.5x | +2-4 days | Good first HDI step when density is moderate |
| 6L 1-N-1 HDI | Embedded compute, gateway, HMI | 1.5x-2.2x | +4-7 days | Most common balance of density and manufacturability |
| 8L 1-N-1 HDI | Dense processor plus memory plus comms | 2.0x-3.0x | +5-10 days | Strong option when routing density is real, not speculative |
| 8L 2-N-2 HDI | Telecom, RF-digital mixed boards, high escape demand | 2.8x-4.0x | +8-14 days | Only justify when layout proof shows 1-N-1 is insufficient |
| Via-in-pad + filled microvia | Ultra-dense BGA, shortest path, thermal pad escape | 3.0x-4.5x | +8-14 days | Excellent technically, expensive if overused |
"A buyer can save 20% on bare board price and still lose the program if the chosen stackup adds one more prototype loop, two more weeks of validation, and a redesign of the shielding or connector geometry."
— Hommer Zhao, Engineering Director at FlexiPCB
RFQ Checklist
Bao gia co gia tri khong den tu viec chi gui Gerber. No den khi ban gui ca y do ky thuat: outline, package quan trong, muc tieu stackup, san luong, yeu cau impedance va moi truong su dung thuc te.
- board outline and mechanical drawing
- Gerber or ODB++ data plus drill files
- BOM or at minimum the key fine-pitch packages, connectors, and RF parts
- quantity split: prototype quantity, pilot run, and annual demand
- operating environment, service life, and target lead time
- compliance target such as RoHS, UL, or customer specification
Prototype vs Production Risk
Prototype HDI dau tien chi chung minh rang board co the duoc lam mot lan. No khong chung minh rang do phang, via filling, impedance va kha nang lap rap se on dinh trong san xuat hang loat.
"If you want prototype results to predict mass production, the fabricator must know your intended production volume, test level, and qualification target at the quotation stage. Otherwise the prototype is optimized for speed, while production is optimized for repeatability, and the two do not match."
— Hommer Zhao, Engineering Director at FlexiPCB
Review assembly impact together with your flex assembly strategy and detailed routing constraints such as those in our component placement guide.
Qualification and Testing
Ngay tu RFQ, hay xac dinh ro bang chung ban can: impedance coupon, microsection, plating quality, traceability, xac nhan surface finish va test moi truong neu can. Neu san pham di vao moi truong cong nghiep nang, hay ghi ro ngay tu dau.
Use IPC, embedded systems, and telecommunications equipment references as part of the supplier review discussion.
FAQ
Khi nao board embedded nen chuyen tu PCB thuong sang HDI?
Khi BGA escape, DDR fan-out, connector mat do cao hoac gioi han enclosure buoc thiet ke phai danh doi signal, EMC hay manufacturability. Neu board 6-layer chi song duoc bang cach di vong qua nhieu, thi nen xem xet 1-N-1.
1-N-1 co du cho phan lon thiet bi truyen thong khong?
Voi nhieu gateway, controller va communication module gon nhe, cau tra loi la co. 6L hoac 8L 1-N-1 thuong can bang tot mat do, chi phi va lead time. Cac thiet ke RF nang hon can kiem chung them.
Nguoi mua nen dua gi vao RFQ HDI PCB?
Drawing, Gerber hoac ODB++, BOM hoac danh sach package quan trong, so luong, target lead time, moi truong, impedance target va compliance target. Neu thieu nhung thong tin nay, nha cung cap chi bao gia duoc, khong the dua ra khuyen nghi vung chac.
Vi sao prototype HDI dat nhung san xuat lai gap van de?
Vi prototype thuong duoc toi uu cho toc do, trong khi san xuat doi hoi material control, registration, copper balance, via filling va assembly flatness. Neu y do san xuat khong duoc chot som, ket qua se khac nhau.
Sau khi review du an HDI, nha cung cap nen tra ve gi?
Toi thieu phai co stackup recommendation, DFM comments, lead-time options, tooling assumptions, test suggestions va nhung diem co the anh huong den yield khi len volume.
Next Step
Gui drawing hoac Gerber, BOM hoac danh sach linh kien chinh, so luong prototype va production, moi truong van hanh, target lead time va compliance target. Chung toi se gui lai DFM review, stackup recommendation, rui ro prototype so voi production va bao gia kem cac lua chon lead time. Bat dau tai quote hoac contact.
